A comparative study of hash algorithms with the prospect of developing a CAN bus authentication technique
DOI:
https://doi.org/10.32985/ijeces.13.9.2Keywords:
CAN Bus, SHA-3, ARM-Cortex A9, Number of Cycles, Authentication, Hash algorithms, FPGAAbstract
In this paper, the performances of SHA-3 final round candidates along with new versions of other hash algorithms are analyzed and compared. An ARM-Cortex A9 microcontroller and a Spartan -3 FPGA circuit are involved in the study, with emphasis placed on the number of cycles and the authentication speed. These hash functions are implemented and tested resulting in a set of ranked algorithms in terms of the specified metrics. Taking into account the performances of the most efficient algorithms and the proposed hardware platform components, an authentication technique can be developed as a possible solution to the limitations and weaknesses of automotive CAN (Controlled Area Network) bus – based embedded systems in terms of security, privacy and integrity. From there, the main elements of such a potential structure are set forth.