Optimization Algorithms based compensation of mismatches in Time interleaved Analog to Digital Converters - A Review

Authors

  • Venkata Naga Chakravarthi Manepalli Department of Electronics and Communication Engineering, DR.Y.S.R. ANU College of Engineering and Technology, Guntur, India-522510
  • Chandramohan Bhuma Department of Electronics and Communication Engineering, Bapatla Engineering College, Bapatla, India-522101

DOI:

https://doi.org/10.32985/ijeces.13.3.8

Keywords:

Time interleaved ADCs, Mismatches, Estimation, Correction

Abstract

Time interleaved analog to digital converters (TIADCs) play a significant role in signal processing wherever higher sampling rates are required. However, TIADCs suffer from various mismatches like sampling time, dc offset, gain, bandwidth etc. This results in generation of erroneous signal. Numerous methods were proposed for estimation of these mismatches and for correction of the erroneous signal. Optimization algorithms like genetic algorithm (GA), differential evolution (DE) algorithm were also used for estimation of mismatches. An overview of these algorithms and their performance comparison, with respect to various signal quality metrics like signal to noise ratio (SNR), signal to noise, distortion ratio (SNDR) etc, is given in this article.

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Published

2022-04-19

How to Cite

[1]
V. N. C. Manepalli and C. Bhuma, “Optimization Algorithms based compensation of mismatches in Time interleaved Analog to Digital Converters - A Review”, IJECES, vol. 13, no. 3, pp. 237-244, Apr. 2022.

Issue

Vol. 13 No. 3 (2022)

Section

Review Papers