Power Loss Minimizing Control of Cascaded Multilevel Inverter with Efficient Hybrid Carrier Based Space Vector Modulation

Authors

  • Chinnathambi Govindaraju Department of Electrical and Electronics Engineering Government College of Engineering, Salem, Anna University-Chennai, India
  • Kaliaperumal Baskaran Department of Computer Science and Engineering Government College of Technology, Coimbatore, India

Keywords:

carrier-based space vector modulation, cascaded multilevel inverter, digital signal processor, power loss analysis, total harmonic distortion

Abstract

This paper presents a power loss minimization technique for a cascaded multilevel inverter using hybrid carrier based space vector modulation. The proposal in this paper combines the features of carrier based space vector modulation and the fundamental frequency modulation strategy. The main characteristic of this modulation is the reduction of switching loss and energy efficiency improvements with better harmonic performance. In order to implement this hybrid modulation scheme and deliver the hybrid PWM pulses to the appropriate switches, a TMS320F2407 digital signal processor (DSP) and a Complex Programmable Logic Device (CPLD) are used. The inverter offers lower harmonic distortion and operates with equal thermal stress among the power devices. Using simulation and experimental results, the superior performance of a new PWM method is shown.

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Published

2010-06-01

How to Cite

[1]
Chinnathambi Govindaraju and Kaliaperumal Baskaran, “Power Loss Minimizing Control of Cascaded Multilevel Inverter with Efficient Hybrid Carrier Based Space Vector Modulation”, IJECES, vol. 1, no. 1, pp. 45-53, Jun. 2010.

Issue

Section

Original Scientific Papers